riscemu.instructions.RV32A module
- class riscemu.instructions.RV32A.RV32A(cpu: CPU)
Bases:
InstructionSet
The RV32A instruction set. Currently, load-reserved and store conditionally are not supported due to limitations in the way the MMU is implemented. Maybe a later implementation will add support for this?
- instruction_lr_w(ins: Instruction)
- instruction_sc_w(ins: Instruction)
- instruction_amoswap_w(ins: Instruction)
- instruction_amoadd_w(ins: Instruction)
- instruction_amoand_w(ins: Instruction)
- instruction_amoor_w(ins: Instruction)
- instruction_amoxor_w(ins: Instruction)
- instruction_amomax_w(ins: Instruction)
- instruction_amomaxu_w(ins: Instruction)
- instruction_amomin_w(ins: Instruction)
- instruction_amominu_w(ins: Instruction)